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jtagpxa250.h

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00001 /*
00002  * This file is part of Jelie,
00003  * (c) 2002 Julien Pilet <julien.pilet@epfl.ch> and
00004  * Stephane Magnenat <stephane.magnenat@epfl.ch>
00005  *
00006  * Jelie is free software; you can redistribute it
00007  * and/or modify it under the terms of the GNU General Public License as
00008  * published by the Free Software Foundation; either version 2 of the License,
00009  * or (at your option) any later version.
00010  *
00011  * Jelie is distributed in the hope that it will be useful,
00012  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00013  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014  * GNU General Public License for more details.
00015  *
00016  * You should have received a copy of the GNU General Public License
00017  * along with Foobar; if not, write to the Free Software
00018  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00019  */
00020 
00028 #ifndef _JTAGPXA250_H_
00029 #define _JTAGPXA250_H_
00030 
00031 // this file is common for the debugger and the debug handler
00032 #include <target_to_host.h>
00033 #include <vector>
00034 
00036 #define DEBUG_HANDLER_FILE "debugHandler/debug_handler.bin"
00037 
00039 enum {
00040         JTAG_EXTEST=0x00,
00041         JTAG_SAMPLE=0x01,
00042         JTAG_DBGRX=0x02,
00043         JTAG_CLAMP=0x04,
00044         JTAG_LDIC=0x07,         //< Load Instruction Cache
00045         JTAG_HIGHZ=0x08,
00046         JTAG_DCSR=0x09,         //< Debug Control & Status Register
00047         JTAG_DBGTX=0x10,        
00048         JTAG_IDCODE=0x1E,
00049         //JTAG_IDCODE=0x6, <- ugly hack to check Altera's APEX IDCODE.
00050         JTAG_BYPASS=0x1F,
00051         JTAG_UNSET=0xFF
00052 };
00053 
00054 // Debug Control and Status Register (DCSR)
00055 // (see Intel XScale Microarchitecture User's Manual page 9-4)
00056 #define DCSR_GE (1<<31)
00057 #define DCSR_H  (1<<30)
00058 #define DCSR_TF (1<<23)
00059 #define DCSR_TI (1<<22)
00060 #define DCSR_TD (1<<20)
00061 #define DCSR_TA (1<<19)
00062 #define DCSR_TS (1<<18)
00063 #define DCSR_TU (1<<17)
00064 #define DCSR_TR (1<<16)
00065 #define DCSR_SA (1<<5)
00066 #define DCSR_MOE        (0x07 <<2)
00067 #define DCSR_M  (1<<1)
00068 #define DCSR_E  (1)
00069                 
00070 // Method of entry
00071 // (see Intel XScale Microarchitecture User's Manual page 10-3)
00072 #define MOE_PROC_RESET          (0x0<<2)
00073 #define MOE_INSTR_BRK_HIT       (0x1<<2)
00074 #define MOE_DATA_BRK_HIT        (0x2 << 2)
00075 #define MOE_BKPT_INSTR_EXEC     (0x3 << 2)
00076 #define MOE_EXT_DEB_EV          (0x4 << 2)
00077 #define MOE_VECT_TRAP           (0x5 << 2)
00078 #define MOE_TRACE_FULL_BRK      (0x6 << 2)
00079 
00080 // TX RX Control Register
00081 // (p 10-12)
00082 #define TXRX_RR (1<<31) // RX register Ready
00083 #define TXRX_OV (1<<30) // Overflow sticky flag
00084 #define TXRX_D  (1<<29) // High speed download flag
00085 #define TXRX_TR (1<<28) // TX Register Ready
00086 
00087 #include "jtag.h"
00088 
00092 #define MAX_RETRY_COUNT 1024
00093 
00095 class JTAGpxa250 {
00096 private:
00097         bool doPolling;
00099         unsigned char currentIREG;
00100 
00104         bool isTargetReady;
00105 
00106         unsigned int savePlaces[NBR_OF_SAVE_PLACES];
00107 
00112         typedef struct
00113         {
00114                 void (*callback)(void *);
00115                 void *arg;
00116         } Callback;
00117 
00118         std::vector<Callback> targetReadyCallback;
00119 
00120 public:
00121         JTAGControl *jtag;
00122         
00123         JTAGpxa250(JTAGControl *jtag);
00124 
00126         void registerTargetReadyCallback(void (*func)(void*), void *arg);
00127 
00129         void unregisterTargetReadyCallback(void (*func)(void*));
00130 
00132         bool targetReady() { return isTargetReady; }
00133         
00136         bool init(int argc, char **argv);
00137 
00140         bool loadDebugHandler();
00141         
00144         bool check();
00145 
00147         void invalidateMiniIC();
00148 
00150         void invalidateMainICLine(unsigned int address);
00151 
00153         void loadICLine(bool mini, unsigned int address, unsigned int instructions[]);
00154 
00156         void getReadyForUpload();
00157 
00159         void boot();
00160 
00162         bool loadIC(bool mini, unsigned int startAddr, unsigned int instructions[], 
00163                         unsigned int nbInst);
00164 
00166         void putData(unsigned int startAddr, unsigned int words, 
00167                         unsigned int data[], bool halfword = false);
00168 
00170         void putData(unsigned int addr, unsigned int data, bool halfWord = false) { putData(addr, 1, &data, halfWord); }
00171 
00173         void getData(unsigned int startAddr, unsigned int words, unsigned int data[]);
00174 
00176         void execute(unsigned int startAddr, unsigned int spAddr);
00177 
00179         void extBreak();
00180 
00182         void reboot();
00183 
00188         void pollForTX();
00189 
00191         void continueCmd();
00192 
00199         bool setSavePlace(unsigned int place, unsigned int value);
00200 
00205         unsigned int getSavePlace(unsigned int place);
00206 
00208         enum Cp15Reg {
00209                 IBCR0 = 0,
00210                 IBCR1 = 1,
00211                 DBR0 = 2,
00212                 DBR1 = 3,
00213                 DBCON = 4
00214         };
00215 
00217         bool setCp15DebugRegister(unsigned int value, Cp15Reg reg);
00218 
00220         static void intToCharArrayLE(unsigned int src, unsigned char dest[]);
00221 
00223         static int charArrayLEToInt(unsigned char src[]);
00224 
00225 private:
00226         void ireg(unsigned char instr);
00227         bool writeRX(unsigned int val);
00228         void fastWriteRX(unsigned int val, bool cont);
00229         bool readTX(unsigned int *val, int max_retry = MAX_RETRY_COUNT);
00230         unsigned int parity(unsigned char data[]);
00231         void ldic();
00232         bool readyForTargetCommand(); 
00233 };
00234 
00236 extern JTAGpxa250 *pxa250Ptr;
00237 #endif

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