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jtag_pp_commander.cpp

00001 /*--------------------------------------------------------------------
00002  * jtag_pp_commander.cpp -- JTAG Parallel Port Commander Class 
00003  *--------------------------------------------------------------------
00004  * $Id: jtag_pp_commander.cpp,v 1.1 2003/04/08 08:59:53 cgaudin Exp $
00005  *--------------------------------------------------------------------
00006  * This file is part of JTAG Framework
00007  * (c) 2002 Julien Pilet <julien.pilet@epfl.ch> and
00008  *          Stephane Magnenat <stephane.magnenat@epfl.ch>
00009  *--------------------------------------------------------------------
00010  * JTAG Framework is free software; you can redistribute it
00011  * and/or modify it under the terms of the GNU General Public License 
00012  * as published by the Free Software Foundation; either version 2 of 
00013  * the License, or (at your option) any later version.
00014  *
00015  * JTAG Framework is distributed in the hope that it will be useful,
00016  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00017  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00018  * GNU General Public License for more details.
00019  *
00020  * You should have received a copy of the GNU General Public License
00021  * along with Foobar; if not, write to: 
00022  * Free Software Foundation, Inc., 
00023  * 59 Temple Place, 
00024  * Suite 330, Boston, MA  02111-1307  USA
00025  *--------------------------------------------------------------------
00026  *! \file
00027  *
00028  * \brief JTAG Commander for Parallel Port 
00029  *
00030  * \author Julien Pilet <julien.pilet@epfl.ch>
00031  * \author Stephane Magnenat <stephane.magnenat@epfl.ch>
00032  * \author Cedric Gaudin <cedric.gaudin@epfl.ch> 
00033  */
00034 
00035 #include "jtag_pp_commander.h"
00036 
00037 /* JTAG state machine */
00038 const int JSM[16][2] = {
00039   { JS_IDLE       , JS_RESET } ,
00040   { JS_IDLE       , JS_SELECT_DR_SCAN } ,
00041   { JS_CAPTURE_DR , JS_SELECT_IR_SCAN } ,
00042   { JS_SHIFT_DR   , JS_EXIT1_DR } ,
00043   { JS_SHIFT_DR   , JS_EXIT1_DR } ,
00044   { JS_PAUSE_DR   , JS_UPDATE_DR } , 
00045   { JS_PAUSE_DR   , JS_EXIT2_DR } ,
00046   { JS_SHIFT_DR   , JS_UPDATE_DR } ,
00047   { JS_IDLE       , JS_SELECT_DR_SCAN } ,
00048   { JS_CAPTURE_IR , JS_RESET } ,
00049   { JS_SHIFT_IR   , JS_EXIT1_IR } ,
00050   { JS_SHIFT_IR   , JS_EXIT1_IR } ,
00051   { JS_PAUSE_IR   , JS_UPDATE_IR } ,
00052   { JS_PAUSE_IR   , JS_EXIT2_IR } ,
00053   { JS_SHIFT_IR   , JS_UPDATE_IR } ,
00054   { JS_IDLE       , JS_SELECT_DR_SCAN }
00055 };
00056 
00057 
00058 JTAG_ParallelPort_Commander::JTAG_ParallelPort_Commander( JTAG_Driver * driver )
00059 {
00060   this->driver = driver; 
00061   state = JS_RESET;
00062 }
00063 
00064 JTAG_ParallelPort_Commander::~JTAG_ParallelPort_Commander()
00065 {
00066   delete driver;
00067 }
00068 
00069 bool JTAG_ParallelPort_Commander::init( int argc , 
00070                                         char **argv )
00071 {
00072   if (!driver->init( argc , argv ))
00073     return false;
00074 
00075   // we need a method for checking 
00076   // instruction register length
00077   // this->ir_reg_length = ir_reg_length;
00078   this->ir_reg_length = 5;
00079   
00080   return true;
00081 }
00082 
00083 void JTAG_ParallelPort_Commander::ireg( unsigned char * data )
00084 {
00085   unsigned long value;
00086 
00087   value = data[0];
00088 
00089   if ( ir_reg_length > 8 )
00090     value |= ((data[1] << 8)&0xff00);
00091 
00092   if ( ir_reg_length > 16 )
00093     value |= ((data[2] << 16)&0xff0000);
00094 
00095   if ( ir_reg_length > 24 )
00096     value |= ((data[3] << 24)&0xff000000);
00097 
00098   jtag_ireg(value);
00099 }
00100 
00101 void JTAG_ParallelPort_Commander::dreg( unsigned char * data , unsigned char length , bool writeOnly )
00102 {
00103   unsigned long value;
00104   unsigned int  count;
00105 
00106   count = 0;
00107   while ( count < length ) {
00108     value = data[8*count];
00109     
00110     if (( count + 8 ) <= length ) 
00111       value |= ((data[count/8+1]<<8)&0xff00);
00112     
00113     if (( count + 16 )  <= length )
00114       value |= ((data[count/8+2]<<8)&0xff0000);
00115     
00116     if (( count + 24 ) <= length )
00117       value |= ((data[count/8+3]<<8)&0xff000000);
00118     
00119     value  = jtag_dreg( ((count + 32 <= length)?32:(length-count)) , value );
00120     
00121     count += 32;
00122   }
00123 }
00124 
00125 void JTAG_ParallelPort_Commander::jtagReset( void )
00126 {
00127   jtag_reset( false );
00128 }
00129 
00130 void JTAG_ParallelPort_Commander::cpuReset( bool state )
00131 {
00132   cpu_reset( state );
00133 }
00134 
00135 void JTAG_ParallelPort_Commander::trst( bool state )
00136 {
00137   // really do nothing !
00138   jtag_reset( true );
00139 }
00140 
00141 void JTAG_ParallelPort_Commander::idle( unsigned int nbTCK )
00142 {
00143   // nbTCK are ignored !
00144 
00145   jtag_idle();
00146 }
00147 
00148 void JTAG_ParallelPort_Commander::flushQueue()
00149 {
00150   flush();
00151 }
00152 
00153 const char *JTAG_ParallelPort_Commander::getName( void ) const
00154 {
00155   return "ppdriver";
00156 }
00157 
00158 bool JTAG_ParallelPort_Commander::jtag_reset( bool cold )
00159 {
00160   if ( cold )
00161     return false;
00162 
00163   for (int i=0; i<5; i++)
00164     advance(1);
00165 
00166   return true;
00167 }
00168 
00169 void JTAG_ParallelPort_Commander::jtag_idle( )
00170 {
00171   if ( state != JS_UPDATE_IR &&
00172        state != JS_UPDATE_DR )
00173     jtag_reset(false);
00174   
00175   advance(0);
00176 
00177 }
00178 
00179 bool JTAG_ParallelPort_Commander::cpu_reset( bool state )
00180 {
00181   return driver->drive_signal( SIGNAL_CPU_RESET ,
00182                                state ,
00183                                false ,
00184                                true );
00185 }
00186 
00187 void JTAG_ParallelPort_Commander::jtag_ireg( unsigned long value )
00188 {
00189   if ( state != JS_IDLE && 
00190        state != JS_RESET )
00191     jtag_idle();
00192     
00193   advance(1);
00194   advance(1);
00195   advance(0);
00196   advance(0);
00197   // SHIFT_IR
00198   
00199   driver->transfer_data( ir_reg_length , 
00200                          value ,
00201                          true );
00202 
00203   advance(1);
00204   advance(1);
00205   // UPDATE_IR
00206 }
00207 
00208 unsigned long JTAG_ParallelPort_Commander::jtag_dreg( int bit_count ,
00209                                                       unsigned long data )
00210 {
00211   return driver->transfer_data( bit_count , 
00212                                 data ,
00213                                 false );
00214 }
00215 
00216 bool JTAG_ParallelPort_Commander::jtag_shiftdr()
00217 {
00218   if ( state != JS_UPDATE_DR &&
00219        state != JS_UPDATE_IR ) {
00220     if ( state != JS_RESET &&
00221          state != JS_IDLE ) 
00222       return false;
00223     else {
00224       // JS_RESET or JS_IDLE
00225 
00226       advance(0);
00227       // RUN_TEST/IDLE state
00228 
00229       advance(1); 
00230       advance(0);
00231       advance(0);
00232       // SHIFT_DR
00233       
00234       return true;
00235     }
00236   }
00237   
00238   advance(1);
00239   advance(0);
00240   advance(0);
00241   // SHIFT_DR
00242 
00243   return true;
00244      
00245 }
00246 
00247 bool JTAG_ParallelPort_Commander::jtag_updatedr()
00248 {
00249   if ( state != JS_SHIFT_DR )
00250     return false;
00251 
00252   advance(1);
00253   advance(1);
00254   // UPDATE_DR
00255 
00256   return true;
00257 }
00258 
00259 void JTAG_ParallelPort_Commander::flush()
00260 { 
00261   driver->flush();
00262 }
00263 
00264 void JTAG_ParallelPort_Commander::advance( bool mode_select )
00265 {
00266   driver->drive_signal( SIGNAL_TMS , 
00267                         mode_select ,
00268                         true , 
00269                         true );
00270 
00271   state = JSM[state][(mode_select?1:0)];
00272 }
00273 

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